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FPGA Design/Verification Engineer
Location: Littleton, CO
Job ID: #69548
Pay Range: $75-89 ph (W2)
Duration: 12 mos
The deadline to apply is 08/01/2024
The selected candidate will be responsible for FPGA verification using the UVM methodology and following the company processes.
IN THIS ROLE, YOU WILL:
- Work with low SWaP, radiation hardened, space rated devices.
- Devise a unique verification plan for a given design.
- Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.
- Develop requirements, test cases, build test benches, generate reports, and document verification results.
- Work with an independent design team to document and resolve bugs found in the design.
- Support all aspects of ASIC and FPGA development, to include architecture, design, and analysis.
- Support technical reviews, and be able to present to internal and external stakeholders.
- Experience with UVM verification methodology
- Experience developing test cases based off given requirements.
- Experience building test benches for FPGA / ASIC designs to provide randomized stimulus.
- Experience identifying and implementing necessary test exclusions.
- Experience generating coverage reports (code and functional)
Hands on experience with UVM and closing functional and code coverage is required for this role.
Benefits provided: 401K, medical, dental, and vision, sick time as applicable to state law
Butler America Aerospace, LLC. is proud to provide an equal opportunity workplace and be an affirmative action employer. Consider Butler because we are committed to hiring and retaining a diverse workforce. We recognize that we thrive on diversity and inclusion for the benefit of our employees, our customers, and the communities where we are located. Employment decisions are made without regard to race, color, religion, gender, national origin, ethnicity, veteran status, disability status, age, sexual orientation, gender identity, gender expression, marital status, mental or physical disability or any other legally protected status.
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Location: Littleton, CO
Job ID: #69548
Pay Range: $75-89 ph (W2)
Duration: 12 mos
The deadline to apply is 08/01/2024
The selected candidate will be responsible for FPGA verification using the UVM methodology and following the company processes.
IN THIS ROLE, YOU WILL:
- Work with low SWaP, radiation hardened, space rated devices.
- Devise a unique verification plan for a given design.
- Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.
- Develop requirements, test cases, build test benches, generate reports, and document verification results.
- Work with an independent design team to document and resolve bugs found in the design.
- Support all aspects of ASIC and FPGA development, to include architecture, design, and analysis.
- Support technical reviews, and be able to present to internal and external stakeholders.
- Experience with UVM verification methodology
- Experience developing test cases based off given requirements.
- Experience building test benches for FPGA / ASIC designs to provide randomized stimulus.
- Experience identifying and implementing necessary test exclusions.
- Experience generating coverage reports (code and functional)
Hands on experience with UVM and closing functional and code coverage is required for this role.
Benefits provided: 401K, medical, dental, and vision, sick time as applicable to state law
Butler America Aerospace, LLC. is proud to provide an equal opportunity workplace and be an affirmative action employer. Consider Butler because we are committed to hiring and retaining a diverse workforce. We recognize that we thrive on diversity and inclusion for the benefit of our employees, our customers, and the communities where we are located. Employment decisions are made without regard to race, color, religion, gender, national origin, ethnicity, veteran status, disability status, age, sexual orientation, gender identity, gender expression, marital status, mental or physical disability or any other legally protected status.
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